Output Level Translation and Tuning

The STM32 host board provides 3.3V to the Pixif, so the PIC's WS2812B bitstream output voltage range is 0 to 3.3V.  Since the NeoPixels are powered at 5V in this project the bitstream voltage from the PIC should be translated to a level more palatable to the WS2812B's.  There are a number of ways to accomplish this but for the Pixif I implemented an approach shown in  Microchip's 3V Tips 'n Tricks.  This document has some neat ideas for handling a number of 3V-to-5V situations.  For this project I used the incredibly simple (and cheap!) diode-based circuitry described in Tip #7.  (Note that Tip #7's written description has a typo that reverses the references to D1 and D2 relative to the schematic shown in the document's Figure 7-1.  The lesson for me (once again!) was to make sure I take the time to understand what a circuit actually does before just plopping it in a design and hoping for the best.)

There are probably better theoretical choices for the diodes (and the pullup resistor value) but in the end I was very happy with the result shown here:

The top trace (CH1) is the bitstream output from the PIC measured at D1's cathode (10x probe).  It's what you might expect: precise levels, clean, fast edges, no knees, no ringing, and minimal undershoot.  One would always hope for such a nice, clean signal at this point because it's about to be mashed some...

The bottom trace (CH2) is the final level-shifted (and output-level-adjusted via R2) signal to the NeoPixels measured at JP1 pin 2 (10x probe).  The logic-low voltage level is exactly as Tip #7 predicted: D1's forward voltage.  The logic-high voltage level (3.8V) is also as predicted by Tip #7 after R2 reduces the level slightly.  (This particular signal level allowed correct operation of the NeoPixels with no risk of the "whiteout" that occurs when the DIN voltage is too high relative to the pixel's VDD.)  I was very happy with level-shifted edges and rates: even in the presence of the probe capacitance the 118 nS rise time gives an ~8.5 MHz edge rate.  Not at all bad for a ~$0.20 level shifter!

This guide was first published on Dec 08, 2014. It was last updated on Dec 08, 2014. This page (Output Level Translation and Tuning) was last updated on Jul 15, 2019.