Three state? But, you say, "I thought binary had 2 states". Well it does: high and low. But what about "disconnected", i.e. no signal? That's the third state we're talking about. A signal line in this third state, aka hi-impedance aka open-collector, doesn't provide a logic level, or anything; it's electrically disconnected. If you have multiple signal sources all running through 3-state buffers, you can enable 1 of them at a time and its logic value will propagate onward.
It's a handy way to basically turn off a signal. If you remember back to part 1, I said that an logic output could connect to some number (limited by its fan-out) of logic inputs, but that multiple outputs could not connect to a single input? Well, 3-state buffers are the way around that. They let you connect one output at a time to an input, controlled by other logic signals.
Consider this family of octal tri-state buffer chips: 74240, 74241, and 74244. They are slightly different from each other, and all incredibly useful. All three include two sets of four tri-state buffers, each set with it's own enable input. They differ along two axis: whether the the buffers are inverting or non-inverting, and whether the two enable inputs are both active low or one active low and one active high.
The '240 is the only one of the three with inverting buffers; the '241 and '244 are both non-inverting. The '244 is the only one of the three with two active low enable inputs; the '240 and '241 have one active low enable, and one active high enable. However, which is which is swapped between the two chips.
Why would you want the two enable inputs to be different? Notice how the two sets of buffers go in the opposite direction. Consider if you connect pairs together as well as connecting the enable inputs together on a '241:
What we have now is a bidirectional 4-bit buffer. The DIR signal controls which buffer of each pair is enabled. That determines whether data flows A->B or B->A because only one buffer in each pair will be enabled, the buffer going the opposite direction will be disabled. This is much like the 74245 buffer chip we'll look at shortly.
Another potential use is to make a 4 2-input multiplexers:
Here, the enable pins are tied together as a select input that enables (as before) one buffer from each pair. In this case, though, the outputs of the pair of buffers are tied together and each input is part of an A or B set of signals. Now the select input choose either A or B to be connected to the O outputs.
The '244 and crew are great if you need data to flow (or not) in a single direction. They can even be convinced to let you control the direction of bidirectional data flow. We did that in the above circuit. However, while it lets us control the direction of flow, we lost the ability to disable it entirely. Also, it left us with only 4 bits being controlled. Computers, especially since 8-bit CPUs became a thing, like to have groups of signals that are multiples of 8 in size.
Add to this that bidirectional, and enable/disable control over a set of related signals (generally referred to as a bus) is incredibly useful. Enter the 74245.
This chip has it all. Eight bits wide, direction control, and an overall enable/disable. You'll be hardpressed to find an 8-bit computer that didn't use one of these to buffer its data bus (and likely a couple of '244s buffering it's address bus). The 8-bit CPUs did not have adequate fan-out to handle the amount of circuitry and peripheral chips in a typical computer, so their buses had to be buffered and '244s and '245s were the chips for the job.
Note that we could build an equivalent circuit with a couple '241s and some gates. But that would take 2 20-pin chips and a couple 14-pin ones. The '245 does it all in a single 20-pin package.
One notable thing about the '245 is that all the As are on one side and all the Bs are on the other. This isn't that big of a deal on a PCB, but on a breadboard it's really handy to have a bus go in one side of the chip and out the other. So much so that I'll use this in place of a '244 for one-direction buffering of a bus. All that needs to be done is to hardwire the DIR input to have signals flow in the desired direction.