Modern* memory chips are incredibly easy to use (apart from dynamic RAM refresh requirements). Below is a typical schematic for using a 2Kx8 EPROM and a 32Kx8 static RAM. Notice the address bus that is common to both, as well as the data bus.The CPU places the address of the data it want to read/write on the address bus. For a read, it will take the resulting data from the data bus after the selected chip provides it. For a write, the CPU will place the data to be written on the data bus and ask the appropriate chip to write int into the selected location. Read (/RD) signal goes to the output enable (/OE) signal of each chip. That asks the chip to put the addressed data on its data pins if the chip select (/CS) is also active. The write signal (/WR) only goes to the RAM chip since the EPROM can not write in-circuit so has no write enable (/WE) input.  It does connect to the RAM chip, though, asking it to take whatever is on its data pins and place it in the addressed location.

That's all there really is to it. The only real work is generating those chip select signals (/ROM and /RAM in this case) and for that we generally want to use some sort of 1-of-n decoder (e.g. a 74138).

_{* since the 80s if not before that}