Say we have 4 input signals. How do we talk about them? How do we talk about the values on them?
Typically we use the letters A, B, and so forth to denote groups of related inputs. Each individual input is denoted by subscripting the name: A0, A1, etc. A0 is the ones digit, A1 is the two's, A3, is the four's, and so on. If A0 is high, A1 is low, A2 is low, and A3 is high, the bit pattern of A is
Outputs are usually named O, or Q, or Y. For a group of related outputs we use the same naming as inputs: Q0, Q1, and so on.
By pattern I mean a specific combination of highs and lows on a set of signals. For example, let's take the case where we have 4-bit input signal A as above and we want to detect when it has the value 1001. What exactly is this pattern? Well, A3 is high AND A2 is low AND A1 is low AND A0 is high. That's four inputs all ANDed together. It just so happens that the 7421 contains two 4-input AND gates. Just what we need. However, some of the inputs are high and some are low. We can use NOT gates (aka inverters) to invert the signals that need to be low in the pattern so that they are high going into the AND gate when the pattern is present.
It's very often the case that we will want to decode various patterns present on the inputs. In general we use inverters to generate negated versions of the inputs. Then we can select the versions (negated or not) for each AND gate that matches a pattern to be recognised. For example:
This is so common, in fact, that there are chips specifically for this. They are call one-of-n decoders. For example the 7442 is a 1-of-10 decoder. It has four inputs as we described above, and 10 outputs corresponding to input patterns of 0000 - 1001.
Notice the little circles on each output? This means the output is active low. That just means that when the output is active it has a logic low value, rather than a logic high. So, when the corresponding value is present on the inputs (1001 for example) the corresponding output (9) will be low and the rest will be high.
Another useful decoder is the 74139 dual 1-of-4 decoder. This 16 pin chip contains two 1-of-4 decoders, with a the added feature of an enable input (which is quite common). The decoder works as you would expect with the addition that if the active low enable input is high, all the active low outputs are high regardless of the A inputs. When the enable is low, the decoder operates as usual, setting the corresponding output low.
Internally, these decoders look very much like the circuits above. Here's one of the 1-of-4 decoders.
Notice how NAND gates are used instead of ANDs as I've used above. That's why decoder output are typically active low. Recall that NAND gates are the simplest gates to make, requiring fewer transistors and less space.
Another useful decoder is the 74138 1-of-8. This takes 3 input lines and decodes them to 8 active low outputs.
An interesting feature of this chip is its 3 enable inputs: 2 active low and 1 active high. This is very useful when combining them in make a larger (wider) 1-of-n decoders. A 1-of-16, for example.
Here, the A3 input is connected to an active low enable of the lower 1-of-8 decoder, and to the active high enable of the higher one. This way, when A is between
0b0111, inclusive, (A3 is low) the lower decoder is enabled. When A is
0b1111, inclusive, (A3 is high) the higher decoder is enabled.