The UDA1334A is an I2S amplifier - it does not use analog inputs, it only has digital audio input support! Don't confuse I2S with I2C, I2S is a sound protocol whereas I2C is for small amounts of data.

Power Pins

The UDA1334A requires 3.3V power but can take 3-5V level logic on nearly all pins.


You can provide 3-5V power on the VIN pin and GND and the built in regulator will generate a nice clean 3.3V supplier on 3VOut.


Use the quietest power supply for Vin, we do filter the power supply, but the quieter the better!

I2S Pins

Three pins are used for stereo I2S data in. These pins are required!

These can be 3.3-5V logic

  • WSEL (Word Select or Left/Right Clock) - this is the pin that tells the DAC when the data is for the left channel and when its for the right channel
  • DIN (Data In) - This is the pin that has the actual data coming in, both left and right data are sent on this pin, the WSEL pin indicates when left or right is being transmitted
  • BCLK (Bit Clock) - This is the pin that tells the amplifier when to read data on the data pin.

MCLK is not required to use this DAC, if you have an MCLK pin on your audio source, leave it disconnected.

Audio Outputs

The exciting part! This is where your line level audio comes out. We put big 47uF blocking capacitors on the output so you can connect this to any stereo system. AGND is a clean analog ground signal that we recommend using as your analog reference, you'll get a cleaner signal.


Note that this DAC was intended for use with a separate amplifier and is rated for a 3 KΩ load. However, we've found you can plug in 32Ω headphones and the output is current-limited so it won't damage the DAC but you will get distortions. (Powered headphones won't have this issue)

Optional Control Pins

There are some extra configuration pins if you want to use them. They are not required for 99% of usage with an Arduino or Teensy or Raspberry Pi. But you never know! So they are there for you. PLL and SF0 are 3.3V logic only, the other pins are 3-5V safe.

Most of the pins have to do with changing the setup from audio mode to video mode. If you happen to want video-mode, for synchronizing with NTSC/PAL, check the datasheet - we haven't used it for that purpose.

  • SCLK (Sys Clock) - Optional 27 MHz 'video mode' ssytem clock input - by default we generate the sysclock from the WS clock in 'audio mode' But the UDA can also take a oscillator input on this pin
  • Mute - Setting this pin High will mute the output
  • De-Emphasis - In audio mode (which is the default), can be used to add a de-emphasis filter. In video mode, where the system clock is generated from an oscillator, this is the clock output.
  • PLL - sets the PLL mode, by default pulled low for Audio. Can be pulled high or set to ~1.6V to set PAL or NTSC video frequency

SF0 and SF1 are used to set the input data format. By default both are pulled Low for I2S but you can change them around for alternate formats.


See the back of the PCB for a quick reference

This guide was first published on Nov 21, 2017. It was last updated on Feb 19, 2024.

This page (Pinouts) was last updated on Nov 21, 2017.

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